PIC16F88-I/ML【PDF 14/200 页】IC MCU FLASH 4KX14 EEPROM 28QFN

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110

8008H–AVR–04/11

ATtiny48/88

12.11 Register Description

12.11.1

TCCR1A – Timer/Counter1 Control Register A

Bits 7:6 – COM1A[1:0]: Compare Output Mode for Channel A

Bits 5:4 – COM1B[1:0]: Compare Output Mode for Channel B

The COM1A[1:0] and COM1B[1:0] control the Output Compare pins (OC1A and OC1B respec-

tively) behavior. If one or both of the COM1A[1:0] bits are written to one, the OC1A output

overrides the normal port functionality of the I/O pin it is connected to. If one or both of the

COM1B[1:0] bit are written to one, the OC1B output overrides the normal port functionality of the

I/O pin it is connected to. However, note that the Data Direction Register (DDR) bit correspond-

ing to the OC1A or OC1B pin must be set in order to enable the output driver.

When the OC1A or OC1B is connected to the pin, the function of the COM1x[1:0] bits is depen-

dent of the WGM1[3:0] bits setting. Table 12-2 shows the COM1x[1:0] bit functionality when the

WGM1[3:0] bits are set to a Normal or a CTC mode (non-PWM).

Table 12-3 shows the COM1x[1:0] bit functionality when the WGM1[3:0] bits are set to the fast

PWM mode.

Note:

1. A special case occurs when OCR1A/OCR1B equals TOP and COM1A1/COM1B1 is set. In

this case the compare match is ignored, but the set or clear is done at TOP. See “Fast PWM

Mode” on page 101. for more details.

Bit

7654

(0x80)

COM1A1

COM1A0

COM1B1

COM1B0

–

WGM11

WGM10

TCCR1A

Read/Write

R/W

Initial Value

0000

Table 12-2.

Compare Output Mode, non-PWM

COM1A1/COM1B1

COM1A0/COM1B0

Description

Normal port operation, OC1A/OC1B disconnected.

Toggle OC1A/OC1B on Compare Match.

Clear OC1A/OC1B on Compare Match (Set output to

low level).

Set OC1A/OC1B on Compare Match (Set output to

high level).

Table 12-3.

Compare Output Mode, Fast PWM(1)

COM1A1/COM1B1

COM1A0/COM1B0

Description

Normal port operation, OC1A/OC1B disconnected.

WGM1[3:0] = 14 or 15: Toggle OC1A on Compare

Match, OC1B disconnected (normal port operation).

For all other WGM1 settings, normal port operation,

OC1A/OC1B disconnected.

Clear OC1A/OC1B on Compare Match, set

OC1A/OC1B at TOP

Set OC1A/OC1B on Compare Match, clear

OC1A/OC1B at TOP

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